ONE DAY Faculty Development Programme on BLUESPEC on 3 July 2015

 

ONE DAY Faculty Development Programme on BLUESPEC on 3 July 2015 New methodology for designing Hardware

Topics to be covered

HDL an Introduction (Video on Processor manufacturing)

Basics on HDL (Combinational & SequentialCircuits ).

History of Hardware Design Language(VHDL,VERILOG, SYSTEM   VERILOG, BLUESPEC SYSTEM VERILOG)

What is System On Chip

FPGA and ASIC connection with HDL

Digital Design, Digital Design Verification, Fabrication,Reconfigurabledesign. 

Verilog sample codes with simulation Results.

High level Abstraction HDL (BSV)

BSV Advantages over Previous HDL Versions.

Bluespec Tools

Bluespec Basic Terminologies

Setup, Compilation and Execution Steps

Small Exercises

 

For more information,
Mr K.Sivakumar (Assistant Professor CSE Department)
Mr. M.PrasathPandian (Assistant Professor CSE Department)
Contact
hodcse@kanchiuniv.ac.in